1. Field
The present disclosure pertains to the field of information processing, and, more specifically, to the field of memory management and protection.
2. Description of Related Art
Information processing systems, such as those including a processor in the Pentium® Processor Family from Intel Corporation, may provide a system management mode (“SMM”), which is an operating environment that is parallel to the normal execution environment and may be used to perform special tasks such as system management, device management, power management, thermal management, reliability functions, availability functions, serviceability functions, etc. SMM is typically entered by asserting a system management interrupt pin and exited by executing a resume instruction. Since SMM is a separate operating environment, it has its own private memory space that must be protected from the normal execution environment. Although this private memory space is separate from regular system memory, it is mapped to an address region in regular system memory.
The address region in regular system memory to which SMM code is mapped should only be accessible during SMM operation. However, since a typical cache does not distinguish between SMM code and other code, a known virus exploit involves writing to a cache at an address to which SMM code is mapped. One approach to protecting SMM code from this exploit it to use memory type range registers (“MTRRs”) to set SMM code regions as un-cacheable during normal execution, write-back cacheable on entry to SMM, and back to un-cacheable on resume.